2003-09-25 23:22:56 UTC
I was trying to complile mult_test.v, mult.v and ALU_struct.v, makefile
gives the following results:
Parsing design file 'mult_test.v'
Parsing design file 'mult.v'
Error-[V2KS] Verilog 2000 IEEE 1364-2000 syntax used. Please compile with
to support this construct
Comma separated sensitivity lists.
Parsing design file 'ALU_struct.v'
What does that mean? Is there a way to get around it?